Generate a build log file with GNU Make

make 2>&1 | tee build.log

This will redirect standard output, as well as err output to build.log.

Posted in Uncategorized | Leave a comment

MyHDL: First LED Blinker Test Working!

I’ve been tinkering with MyHDL lately on the Z-turn board by MYIR. I have to say this board is pretty fun to play with so far, and i’ve left some resources on my blog about it, that might get updated later: MYIR Z-turn FPGA Board Pin Assignments.

Back to the MyHDL. I’m only just starting Python, but from the looks of it, it’s been fairly painless to understand so far. The use of Python (MyHDL is in fact only a library that’s used to do hardware dev and simulation) makes it faaaar easier to simulate designs than using the very frustrating Verilog simulators out there.

With the RTL logic, the rest of the verification framework can be regular python. Run the project, and you get a neat GTKWave output file, load it in, check if everything is okay, iterate.

I’ve written a little LED blinker for the Z-turn. It’s not the most amazing project ever, but it’s good as a template perhaps.

from myhdl import *

## Not synthesizable, it is used for the bench.
def ClkDriver(clk, period=20):
	lowTime = int(period/2)
	highTime = period - lowTime

	def drive_clk():
		while True:
			yield delay(lowTime) = 1
			yield delay(highTime) = 0

	return drive_clk

def hello2_top(clk, reset_n, ledRed, ledGreen, ledBlue,

	clk: input, clock signal
	reset_n: input, reset signal, inverted.
	ledRed: output, signal inverted.
	ledGreen: output, signal inverted.
	ledBlue: output, signal inverted.

	count = Signal(intbv(0, 0, 2**64))

	@always (clk.posedge)
	def led_driver():
		if reset_n == 0: = not 0 = not 0 = not 0
			next_count = count + 1
			if next_count == led_period:
				next_count = 0 = not ledRed = next_count

	return instances()

def hello2():

	clk1 = Signal(bool(0))

	ledR = Signal(bool(0))
	ledG = Signal(bool(0))
	ledB = Signal(bool(0))

	reset_n = Signal(bool(0))

	clkdriver_1 = ClkDriver(clk1)
	hello2_top_1 = hello2_top(clk1, reset_n, ledR, ledG, ledB, 1000)

	def stimul(): = 0
		yield delay(100) = 1

	return instances()

inst = hello2()

# Rig up for synthesis.

clk1 = Signal(bool(0))
reset_n = Signal(bool(0))
ledRed = Signal(bool(0))
ledGreen = Signal(bool(0))
ledBlue = Signal(bool(0))

inst = hello2_top(clk1,reset_n,ledRed,ledGreen,ledBlue, 12000000)

Running project looks like a board with a blinking LED.

Posted in Uncategorized | Leave a comment

MYIR Z-turn FPGA Board Pin Assignments

Not exhaustive.


12 MHz clock: U14
RGB Led (red): R14
RGB Led (green): Y16
RGB Led (blue): Y17
Switch 0: R19
Switch 1: T19
Switch 2: G14
Switch 3: J15
Posted in Uncategorized | Leave a comment

Linux: Disable the Password Failure Delay (Revisited)

To get rid of this annoying delay, for example when running a sudo command, you can do the following with PAM configuration.

pam-config --update --unix-nodelay

Additionally, for regular “su”, you’ll want to go to the configuration file /etc/login.defs and set the appropriate option.

FAIL_DELAY              0

VoilĂ !

Posted in Uncategorized | Leave a comment

Using ExpressVPN on Gentoo: Short Guide

ExpressVPN comes as either a deb or rpm package. We’ll choose the rpm package, so first install that.

sudo emerge rpm

Then you want to install the package without any dependencies.

sudo rpm -i --nodeps expressvpn-1.4.0-1.x86_64.rpm

ExpressVPN is now installed, but since Gentoo runs the OpenRC init system we’ll want to go ahead and create a service file in /etc/init.d/expressvpnd.

name="ExpressVPN Daemon"

depend() {
        # need net

We need some more configuring.

ln -s /bin/ip /sbin/ip; modprobe tun

Then you can start the service as usual and add it to your runlevel default, and control the application using the Firefox extension available on the main website.

Posted in Uncategorized | Leave a comment